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high accuracy, ultralow i q , 1.5 a, anycap low dropout regulator data sheet adp3339 rev. c information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. specifications subject to change without notice. no license is granted by implication or otherwise under any patent or patent rights of analog devices. trademarks and registered trademarks are the property of their respective owners. one technology way, p.o. box 9106, norwood, ma 02062-9106, u.s.a. tel: 781.329.4700 www.analog.com fax: 781.461.3113 ?2001C2011 analog devices, inc. all rights reserved. features high accuracy over line and load: 0.9% at 25c, 1.5% over temperature ultralow dropout voltage: 230 mv (typical) at 1.5 a requires only c out = 1.0 f for stability anycap = stable with any type of capacitor (including mlcc) current and thermal limiting low noise 2.8 v to 6 v input voltage range ?40c to +85c ambient temperature range sot-223 package applications notebooks, palmtop computers scsi terminators battery-powered systems pcmcia regulators bar code scanners camcorders, cameras functional block diagram thermal protection cc in adp3339 out r1 r2 gnd q1 bandgap ref driver g m 02191-0-001 figure 1. v in out adp3339 1 f 1 f v out gnd in 02191-0-002 figure 2. typical application circuit general description the adp3339 is a member of the adp33xx family of precision, low dropout, anycap? voltage regulators. the adp3339 operates with an input voltage range of 2.8 v to 6 v and delivers a load current up to 1.5 a. the adp3339 stands out from the conventional ldos with a novel architecture and an enhanced process that enables it to offer performance advantages and higher output current than its competition. its patented design requires only a 1.0 f output capacitor for stability. this device is insensitive to output capacitor equivalent series resistance (esr), and is stable with any good quality capacitor, including ceramic (mlcc) types for space-restricted applications. the adp3339 achieves exceptional accuracy of 0.9% at room temperature and 1.5% over temperature, line, and load variations. the dropout voltage of the adp3339 is only 230 mv (typical) at 1.5 a. the device also includes a safety current limit and thermal overload protection. the adp3339 has ultralow quiescent current: 130 a (typical) in light load situations.
adp3339 data sheet rev. c | page 2 of 12 table of contents features .............................................................................................. 1 ? applications....................................................................................... 1 ? functional block diagram .............................................................. 1 ? general description ......................................................................... 1 ? revision history ............................................................................... 2 ? specifications..................................................................................... 3 ? absolute maximum ratings............................................................ 4 ? esd caution.................................................................................. 4 ? pin configuration and function descriptions............................. 5 ? typical performance characteristics ............................................. 6 ? theory of operation .........................................................................9 ? applications information .............................................................. 10 ? capacitor selection .................................................................... 10 ? output current limit ................................................................ 10 ? thermal overload protection .................................................. 10 ? calculating power dissipation ................................................. 10 ? printed circuit board layout considerations ....................... 10 ? outline dimensions ....................................................................... 11 ? ordering guide .......................................................................... 11 ? revision history 8/11rev. b to rev. c changes to ordering guide .......................................................... 11 4/11rev. a to rev. b change to features section ............................................................. 1 changed i l to i load throughout ..................................................... 3 updated outline dimensions ....................................................... 11 changes to ordering guide .......................................................... 11 6/04rev. 0 to rev. a updated format..................................................................universal changes to table 1............................................................................ 3 changes to thermal overload protection section .................... 10 updated outline dimensions ....................................................... 12 changes to ordering guide .......................................................... 12 10/01revision 0: initial version
data sheet adp3339 rev. c | page 3 of 12 specifications v in = 6.0 v, c in = c out = 1 f, t j =C40c to +125c, unless otherwise noted. table 1. parameter 1 , 2 symbol conditions min typ max unit output voltage accuracy 3 v out v in = v outnom + 0.5 v to 6 v, i load = 0.1 ma to 1.5 a, t j = 25c C0.9 +0.9 % v in = v outnom + 0.5 v to 6 v, i load = 0.1 ma to 1.5 a, t j = C40c to +125c C1.5 +1.5 % v in = v outnom + 0.5 v to 6 v, i load = 100 ma to 1.5 a, t j = 150c C1.9 +1.9 % line regulation 3 v in = v outnom + 0.5 v to 6 v, t j = 25c 0.04 mv/v load regulation i load = 0.1 ma to 1.5 a, t j = 25c 0.004 mv/ma dropout voltage v drop v out = 98% of v outnom i load = 1.5 a 230 480 mv i load = 1 a 180 380 mv i load = 500 ma 150 300 mv i load = 100 ma 100 mv peak load current i ldpk v in = v outnom + 1 v 2.0 a output noise v noise f = 10 hz to 100 khz, c l = 10 f, i load = 1.5 a 95 v rms ground current in regulation i gnd i load = 1.5 a 13 40 ma i load = 1 a 9 25 ma i load = 500 ma 5 15 ma i load = 100 ma 1 3 ma i load = 0.1 ma 130 200 a in dropout i gnd v in = v outnom ? 100 mv, i load = 0.1 ma 100 300 a 1 all limits at temperature extremes are gua ranteed via correlation using standard st atistical quality control (sqc) methods. 2 application stable with no load. 3 v in = 2.8 v for models with v outnom 2.3 v.
adp3339 data sheet rev. c | page 4 of 12 absolute maximum ratings unless otherwise specified, all voltages are referenced to gnd. table 2. parameter rating input supply voltage C0.3 v to +8.5 v power dissipation internally limited operating ambient temperature range C40c to +85c operating junction temperature range C40c to +150c ja , 4-layer board 62.3c/w jc 26.8c/w storage temperature range C65c to +150c lead temperature (soldering 10 sec) 300c vapor phase (60 sec) 215c infrared (15 sec) 220c stresses above those listed under absolute maximum ratings may cause permanent damage to the device. this is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. only one absolute maximum rating may be applied at any one time. esd caution
data sheet adp3339 rev. c | page 5 of 12 pin configuration and fu nction descriptions 02191-0-003 3 2 1 in out top view (not to scale) adp3339 out gnd notes 1. pin 2 and out tab are internally connected. figure 3. 3-lead sot-223 pin configuration table 3. pin function descriptions pin o. neonic description 1 gnd ground pin. 2 out output of the regulator. bypass to ground with a 1 f or larger capacitor. 3 in regulator input. bypass to ground with a 1 f or larger capacitor.
adp3339 data sheet rev. c | page 6 of 12 typical performance characteristics t a = 25c, unless otherwise noted. input voltage (v) output voltage (v) 345 v out = 3.3v 6 02191-0-004 3.301 3.300 3.299 3.298 3.297 3.296 3.295 3.294 3.293 i load = 1a i load = 1.5a i load = 500ma i load = 0a figure 4. output volt age vs. input voltage output vol t age (v) 02191-0-005 load current (a) 01 . 0 0.5 v in = 6v 3.301 3.300 3.299 3.298 3.297 3.296 3.295 3.294 1 . 5 figure 5. output voltage vs. load current input voltage (v) ground current ( a) 04 02191-0-006 6 2 180 160 140 120 60 40 20 0 100 80 v out = 3.3v i load = 0a figure 6. ground current vs. supply voltage load current (a) ground current (ma) 0 0 0.5 1.0 v in =6v v out = 3.0v 1.5 2 4 6 8 10 12 02191-0-007 14 figure 7. ground current vs. load current junction temperature ( c) output voltage (%) ?0.2 ?40 ?20 0 20 40 60 80 100 120 0 0.2 0.4 0.6 1.0 02191-0-008 0.8 v in = 6v v out = 3.3v i load = 1.5a i load = 500ma i load = 1a i load = 10ma 140 figure 8. output voltage variation percentage vs. junction temperature junction temperature ( c) ground current (ma) 02191-0-009 25 20 15 10 5 0 10 60 110 160 ?40 i load = 1a i load = 0.5a i load = 1.5a i load = 1ma v out = 3.3v figure 9. ground current vs. junction temperature
data sheet adp3339 rev. c | page 7 of 12 load current (ma) dropout (mv) 250 200 0 0 0.2 1.0 0.4 0.6 0.8 150 100 50 02191-0-010 1.2 1.4 v out = 3.3v figure 10. dropout voltage vs. load current 0 56789 time ( s) v out = 3.3v i load = 1.5a input/output voltage (v) 0 1 2 3 02191-0-011 1 2 3 4 10 figure 11. power-up/power-down 4 80 time ( s) v out = 3.3v c out = 1 f i load = 1.5a 120 140 180 5 3.30 3.29 3.31 volts 02191-0-012 40 220 figure 12. line transient response 4 80 time ( s) v out = 3.3v c out = 10 f i load = 1.5a 120 140 180 5 3.30 3.29 3.31 volts 0 2191-0-013 220 40 figure 13. line transient response 0 200 time ( s) 400 600 800 0.5 3.3 3.1 3.5 02191-0-014 v in = 6v c out = 10 f 1.0 1.5 1000 0 volts a figure 14. load transient response 0 200 time ( s) 400 600 800 1.5 3.3 3.1 3.5 02191-0-015 v in = 6v c out = 1 f 1000 0 1.0 0.5 volts a figure 15. load transient response
adp3339 data sheet rev. c | page 8 of 12 v in = 6v 0 200 0 time ( s) 400 600 800 1000 1 0 3.3 volts 02191-0-016 a 2 3 figure 16. short-circuit current 10 100 1k 10k 100k 1m v out = 3.3v ?80 ?70 ?60 ?50 ?40 ?30 ?20 ?10 ?90 0 ripple rejection (db) 02191-0-017 c l = 1 f i load = 1.5a c l = 10 f i load = 0 c l = 1 f i load = 0 ?100 c l = 10 f i load = 1.5a frequency (hz) figure 17. power su pply ripple rejection c l ( f) rms noise ( v) 500 400 0 01 0 50 20 30 40 300 200 100 600 02191-0-018 i load = 0a i load = 1.5a figure 18. rms noise vs. c l (10 hz to 100 khz) frequency (hz) 10 100 1k 10k 100k 1m c l = 1 f 0.001 0.01 0.1 1 10 100 c l = 10 f voltage noise spectral density ( v/ hz) 02191-0-019 figure 19. output noise density
data sheet adp3339 rev. c | page 9 of 12 theory of operation the adp3339 anycap ldo uses a single control loop for regulation and reference functions. the output voltage is sensed by a resistive voltage divider, consisting of r1 and r2, which is varied to provide the available output voltage option. feedback is taken from this network by way of a series diode (d1) and a second resistor divider (r3 and r4) to the input of an amplifier. a very high gain error amplifier is used to control this loop. the amplifier is constructed in such a way that equilibrium produces a large, temperature-proportional input offset voltage that is repeata- ble and very well controlled. the temperature-proportional offset voltage is combined with the complementary diode volt- age to form a virtual band gap voltage that is implicit in the network, although it never appears explicitly in the circuit. ultimately, this patented design makes it possible to control the loop with only one amplifier. this technique also improves the noise characteristics of the amplifier by providing more flexibil- ity on the trade-off of noise sources that leads to a low noise design. the r1/r2 divider is chosen in the same ratio as the band gap voltage to the output voltage. although the r1/r2 resistor divider is loaded by diode d1 and a second divider consisting of r3 and r4, the values can be chosen to produce a temperature- stable output. this unique arrangement specifically corrects for the loading of the divider, thus avoiding the error resulting from base current loading in conventional circuits. the patented amplifier controls a new and unique noninverting driver that drives the pass transistor, q1. the use of this special noninverting driver enables the frequency compensation to include the load capacitor in a pole-splitting arrangement to achieve reduced sensitivity to the value, type, and esr of the load capacitance. most ldos place very strict requirements on the range of esr values for the output capacitor because they are difficult to stabilize due to the uncertainty of load capacitance and resis- tance. moreover, the esr value required to keep conventional ldos stable changes depending on load and temperature. these esr limitations make designing with ldos more difficult because of their unclear specifications and extreme variations over temperature. with the adp3339 anycap ldo, this is no longer true. the adp3339 can be used with virtually any good quality capacitor, with no constraint on the minimum esr. this innovative design allows the circuit to be stable with just a small 1 f capacitor on the output. additional advantages of the pole- splitting scheme include superior line noise rejection and very high regulator gain, which lead to excellent line and load regulation. an impressive 1.5% accuracy is guaranteed over line, load, and temperature. additional features of the circuit include current limit and thermal shutdown. v in out adp3339 c1 1 f c2 1 f v out gnd in 02191-0-021 figure 20. typical application circuit ptat v os g m noninverting wideband driver input q1 adp3339 compensation capacitor attenuation (v bandgap /v out ) r1 d1 r2 r3 r4 output ptat current (a) gnd c load r load 02191-0-020 figure 21. functional block diagram
adp3339 data sheet rev. c | page 10 of 12 applications information capacitor selection output capacitor the stability and transient response of the ldo is a function of the output capacitor. the adp3339 is stable with a wide range of capacitor values, types, and esr (anycap). a capacitor as low as 1 f is all that is needed for stability. a higher capacitance may be necessary if high output current surges are anticipated, or if the output capacitor cannot be located near the output and ground pins. the adp3339 is stable with extremely low esr capacitors (esr 0) such as multilayer ceramic capacitors (mlcc) or oscon. note that the effective capacitance of some capacitor types falls below the minimum over tempera- ture or with dc voltage. input capacitor an input bypass capacitor is not strictly required but is recom- mended in any application involving long input wires or high source impedance. connecting a 1 f capacitor from the input to ground reduces the circuits sensitivity to pc board layout and input transients. if a larger output capacitor is necessary, a larger value input capacitor is also recommended. output current limit the adp3339 is short-circuit protected by limiting the pass transistors base drive current. the maximum output current is limited to about 3 a. see figure 16 . thermal overload protection the adp3339 is protected against damage due to excessive power dissipation by its thermal overload protection circuit. thermal protection limits the die temperature to a maximum of 160c. under extreme conditions (that is, high ambient temperature and power dissipation) where the die temperature starts to rise above 160c, the output current is reduced until the die tempera- ture has dropped to a safe level. current and thermal limit protections are intended to protect the device against accidental overload conditions. for normal operation, the devices power dissipation should be externally limited so that the junction temperature does not exceed 150c. calculating power dissipation device power dissipation is calculated as follows: p d = ( v in C v out ) i load + ( v in i gnd ) where i load and i gnd are the load current and ground current, and v in and v out are the input and output voltages, respectively. assuming worst-case operating conditions are i load = 1.5 a, i gnd = 14 ma, v in = 3.3 v, and v out = 2.5 v, the device power dissipation is p d = (3.3 v C 2.5 v) 1500 ma + (3.3 v 14 ma) = 1246 mw therefore, for a junction temperature of 125c and a maximum ambient temperature of 85c, the required thermal resistance from junction to ambient is c/w1.32 w246.1 c85c125 = ? = ja printed circuit board layout considerations the thermal resistance, ja , of sot-223 is determined by the sum of the junction-to-case and the case-to-ambient thermal resistances. the junction-to- case thermal resistance, jc , is determined by the package design and specified at 26.8c/w. however, the case-to-ambient thermal resistance is determined by the printed circuit board design. as shown in figure 22 , the amount of copper onto which the adp3339 is mounted affects thermal performance. when mounted onto the minimal pads of 2 oz. copper (see figure 22 a), ja is 126.6c/w. adding a small copper pad under the adp3339 (see figure 22 b) reduces the ja to 102.9c/w. increasing the copper pad to 1 square inch (see figure 22 c) reduces the ja even further, to 52.8c/w. 02191-0-022 c ab figure 22. pcb layouts use the following general guidelines when designing printed circuit boards: 1. keep the output capacitor as close to the output and ground pins as possible. 2. keep the input capacitor as close to the input and ground pins as possible. 3. pc board traces with larger cross sectional areas remove more heat from the adp3339. for optimum heat transfer, use thick copper and use wide traces. 4. the thermal resistance can be decreased by adding a copper pad under the adp3339, as shown in figure 22 b. 5. if possible, use the adjacent area to add more copper around the adp3339. connecting the copper area to the output of the adp3339, as shown in figure 22 c, is best, but thermal performance is improved even if it is connected to other pins. 6. use additional copper layers or planes to reduce the thermal resistance. again, connecting the other layers to the output of the adp3339 is best, but is not necessary. when connecting the output pad to other layers, use multiple vias.
data sheet adp3339 rev. c | page 11 of 12 outline dimensions * compliant to jedec standards to-261-aa with the exception to lead width. 103107-a 4.60 bsc 16 10 16 10 10 max 0.75 min 0.25 3 21 2.30 bsc * 0.85 0.70 0.65 1.70 1.50 1.05 0.85 0.10 0.02 1.30 1.10 0.35 0.26 0.24 * 3.15 3.00 2.95 3.70 3.50 3.30 7.30 7.00 6.70 6.70 6.50 6.30 seating plane gauge plane figure 23. 3-lead small outline transistor package [sot-223] (kc-3) dimensions shown in millimeters ordering guide model 1 temperature range output voltage (v) package description package option 2 branding adp3339akc-1.5-rl ?40c to +85c 1.5 3-lead sot-223 kc-3 adp3339akcz-1.5-rl ?40c to +85c 1.5 3-lead sot-223 kc-3 l1c adp3339akcz-1.5-r7 ?40c to +85c 1.5 3-lead sot-223 kc-3 l1c adp3339akcz-1.8-rl ?40c to +85c 1.8 3-lead sot-223 kc-3 l19 adp3339akcz-1.8-r7 ?40c to +85c 1.8 3-lead sot-223 kc-3 l19 adp3339akcz-2.5-rl ?40c to +85c 2.5 3-lead sot-223 kc-3 l1d adp3339akcz-2.5-r7 ?40c to +85c 2.5 3-lead sot-223 kc-3 l1d adp3339akc-2.85-rl ?40c to +85c 2.85 3-lead sot-223 kc-3 adp3339akcz-3-r7 ?40c to +85c 3.0 3-lead sot-223 kc-3 l3f adp3339akc-3.3-rl ?40c to +85c 3.3 3-lead sot-223 kc-3 l1a adp3339akcz-3.3-rl ?40c to +85c 3.3 3-lead sot-223 kc-3 l1a adp3339akcz-3.3-r7 ?40c to +85c 3.3 3-lead sot-223 kc-3 l1a ADP3339AKCZ-5-R7 ?40c to +85c 5 3-lead sot-223 kc-3 l3g 1 z = rohs compliant part. 2 this package option is halide free.
adp3339 data sheet rev. c | page 12 of 12 notes ?2001C2011 analog devices, inc. all rights reserved. trademarks and registered trademarks are the property of their respective owners. d02191-0-8/11(c)

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